Prof. Sachin Sapatnekar to lead DARPA funded project to build open-source hardware generators

The University of Minnesota Twin Cities recently received a $2.2 million grant from the Defense Advanced Research Projects Agency (DARPA), an agency of the U.S. Department of Defense, to build open-source hardware generators for a range of machine learning algorithms that process data in real time. The project is being funded under the Real Time Machine Learning program.

ECE’s Prof. Sachin Sapatnekar will lead the project, and will collaborate with professors Hadi Esmaeilzadeh and Andrew B. Kahng of University of California San Diego, and Prof. Jie Gu of Northwestern University. The latter is an ECE alumnus, having earned his doctoral degree in 2008.

Critical improvements in computing technology in recent decades have enabled the current generation of machine learning. The graphics processing unit (GPU), for instance, has provided an altogether new level of computing power that has allowed machine learning systems to process large data sets. With artificial intelligence moving towards real time learning, current machine learning capabilities must be further advanced. Application Specific Integrated Circuits (ASICs) have the potential to meet the needs of advanced machine learning applications in an energy-efficient manner. Currently, however, the costs associated with developing such integrated circuits are prohibitive. 

The RTML program seeks to develop low-cost Application Specific Integrated Circuits (ASIC) for emerging machine learning applications. The goal is to develop a compiler that, based on the objectives of the machine learning algorithm, can automatically generate hardware design configurations and standard Verilog code that can address specific needs. Two vital high-bandwidth application areas that the RTML program is targeting are 5G networks and image processing. 

The RTML undertaking is the second part of DARPA’s Electronics Resurgence Initiative (ERI), investing more than $1.5 billion in advancing domestic, national, and defense electronic systems. In this phase, the agency is supporting domestic manufacturing options, and the development of circuits capable of meeting diverse and advanced needs. To this end, the RTML program seeks to develop ways in which novel chip designs can be created quickly and at low costs to support emerging machine learning applications.

*Prof. Sachin Sapatnekar was a recipient of the Semiconductor Industry Association University Research Award in 2013