ECE has 5 doctoral dissertation fellowship winners for the 2017-2018 academic year. They are Shreyas Bhaban (advised by Prof. Murti Salapaka), Tianyi Chen (advised by Prof. Giorgios Giannakis), Xingguo Li (Prof. Jarvis Haupt), MohammadHassan Najafi (Prof. David Lilja), and Chen Zhou (Prof. Chris Kim). The award will allow these accomplished PhD candidates the opportunity to devote full-time effort to their research, so they can finalize and write their dissertations during the fellowship year.
Here’s a closer look at the research of some of these recipients.
Tianyi Chen who comes to us from Fudan University in China has been working towards his doctoral degree under the guidance of Prof. Giorgios Giannakis. His research interests include online convex optimization, statistical learning, and stochastic network optimization with applications to Internet-of-Things (IoT), smart power networks, and sustainable fog networks.
His doctoral research is titled “Online Learning and Optimization for Dynamic Cyber-Physical Network Management.” The goal of his research is to leverage networked data (such as those generated from transportation, electric power, and computer networks) to reinforce online network management policies, based on state-of-the-art optimization and statistical learning tools. Tianyi is working towards a rigorous learning-aided network optimization theory. Along with theoretical innovations, his research outcomes also include algorithms and toolboxes for real-world implementations towards faster response in fog-cloud networks, reduced congestion in urban roads, and lower operational costs in power grids. The ultimate goal is to analytically and experimentally demonstrate how insights from big data analytics can lead to improved network control policies. Tianyi is advised by Prof. Giorgios Giannakis.
Mohammadhassan’s research is titled “Time-Encoded Data for Highly Efficient Stochastic Circuits.” Low implementation cost, low power consumption, and high soft error tolerance are the main advantages of stochastic computing. Its relatively long latency, however, is a potential barrier to widespread use of this paradigm, particularly when high accuracy is required. This research introduces a new, high-speed, energy-efficient, yet accurate approach for implementing stochastic circuits based on time-encoded values.
Preliminary results on image processing applications show promising results: up to a 99% performance speedup, 98% saving in energy dissipation, and 40% area reduction compared to prior stochastic implementations. Fault tolerance, lower hardware costs, and a smaller area–delay product make the proposed approach a better choice than the conventional deterministic binary design.
Mohammadhassan’s research also demonstrates that computation on stochastic bit streams has another compelling advantage: circuits naturally and effectively tolerate very high clock skew. Harnessing this advantage, his research introduces a design strategy called polysynchronous clocking, which results in significant latency, area, and energy savings for a variety of applications including image and signal processing applications. Mohammadhassan’s doctoral research is guided by Prof. David Lilja.
Shreyas’ doctoral research rests at the intersection of electrical engineering and molecular and cellular biology. Working with a team of researchers from both domains, Shreyas has been developing advanced computational and experimental techniques to study the transport of cargo inside human cells. The transport occurs through ‘motor-proteins’: tiny single-molecule motors that move essential cargo (anything from proteins to organelles) between different parts of the human cell. These movements, known to be discrete, are so small—the motors themselves are ~100 nm, and the individual movements of those motors ~8 nm—that it is difficult to experimentally determine their motion. Defects in intracellular transport mechanisms are linked to numerous neuro-degenerative disorders such as Alzheimer’s and Huntington’s disease. Understanding diseases at the cellular level requires detailed investigation of motor protein behavior through advances in investigative capabilities.
Through his research, Shreyas has developed a new computational method to model a healthy system of motors carrying cargo inside human cells. When everything is healthy and the motors ferrying the cargo encounter an obstacle (like another cargo in the way), the motors counter by re-orienting themselves so as to not hinder cargo transport. This re-orienting is essential for healthy cargo movement. However, when a mutant motor participates in cargo transport–like the ones related to Huntington’s or Alzheimer’s diseases—this model changes.His research has found that early onset mutations, where mutant motors are initially in minority and become progressively more and more prevalent, can be linked to impaired average cargo run length—the length covered by a cargo to reach its target. This disruption of cargo traffic inside the cell due to even a small number of mutant motors can provide possible insights into the origins of disorders at the sub-cellular level. Employing tools from modern controls he has developed improved experimental methods such as the enhanced optical force clamp which enables much finer experimental investigation of motor protein behavior under a controlled lab environment.
Shreyas Bhaban’s research is supported by Prof. Murti Salapaka from ECE and Prof. Thomas Hays from the Department of Molecular and Cellular Biology at the University of Minnesota. His research is titled “Investigating Nanoscale Interactions of Molecular Motors and Effects of Motor Mutations on Neurodegenerative Diseases.”
Recent studies have shown that hardware-based authentication techniques can significantly enhance the security of smart connected devices compared to software-based approaches alone. Physical unclonable function (PUF) is a circuit used for hardware-based authentication that harnesses the inherent manufacturing variation to generate a random and unpredictable “fingerprint” unique to each device. Multiplexer (MUX) based arbiter PUFs have been recognized as a promising candidate for hardware authentication as they can produce a large number of challenge response pairs (CRPs) from a relatively small silicon area.
The main challenge faced by MUX PUFs is the generation of stable and consistent responses that are sensitive to thermal noise, temperature/voltage variations, and aging effects. To overcome these challenges, Chen’s research proposes an authentication strategy based on only stable CRPs and verified through silicon measurement. Another concern for MUX PUFs is their vulnerability to machine learning attacks. A hacker can mimic the PUF by training a software model using a small number of CRP measurements. To realize a PUF structure that is resistant to modeling attacks, previous works proposed the XOR MUX PUF, where responses from n parallel MUX PUFs are XOR-ed to produce the final 1 bit response. XOR PUF is believed to be more secure than the standard MUX PUF at the cost of exponentially increased percentage of unstable responses. In Chen’s research, he evaluates the resiliency of XOR PUF to modeling attacks using 1 trillion CRPs obtained from multiple 32nm test chips. Measured data suggests that more than 10 individual PUFs are needed for a XOR PUF to be considered secure.
To improve the stability of XOR PUF responses, he has proposed a linear model based stable challenge selection strategy. Experimental results show that the CRPs selected based on his PUF model provide excellent stability under thermal noise, and voltage/temperature variations. Chen is advised by Prof. Chris Kim, and he has previously received the best paper award at the International Symposium on Low Power Electronics and Design 2016 (ISLPED) for “Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs.” Chen is advised by Prof. Chris Kim.