Chris Kim


Research Area: VLSI Circuit Design

4-161 Keller Hall

Area of Expertise:

Digital and mixed-signal circuit design, circuit reliability, radiation effects, time-based circuits, spintronic circuits, hardware security, novel computing, machine learning hardware


Ph.D., EE, 2004, Purdue University, West Lafayette, IN, United States
M.S., BME, 2000, Seoul National University, Seoul, Korea
B.S., EE, 1998, Seoul National University, Seoul, Korea


2019 IEEE Fellow
2018 College of Science and Engineering, Taylor Award for Distinguished Research
2016 SRC Technical Excellence Award
2012 Council of Graduate Students Outstanding Faculty Award
2009 NSF CAREER Award
2008 McKnight Land-Grant Professorship Award
2008 3M Non-Tenured Faculty Award
2006-2008 IBM Faculty Partnership Award
2005 IEEE Circuits and Systems Society Outstanding Young Author Award


My research focuses on designing energy-efficient, robust, and intelligent integrated circuits and systems. Our main expertise is in building chips but we also collaborate extensively with researchers in materials, devices, algorithms, systems, and signal processing. Over the years, we have transferred several key technologies to the semiconductor industry, including the silicon odometer circuit for measuring circuit wear out, radiation monitoring circuits, and SPICE models for magnetic tunnel junctions.


M. Kim, M. Liu, L. Everson, G. Park, Y. Jeon, S. Kim, S. Lee, S. Song, and C.H. Kim, “A 3D NAND Flash Ready 8-Bit Convolutional Neural Network Core Demonstrated in a Standard Logic Process”, IEEE International Electron Devices Meeting (IEDM), Dec. 2019

N. Pande, C. Zhou, MH Lin, R. Fung, R. Wong, S. Wen, and C.H. Kim, “Characterizing Electromigration Effects in a 16nm FinFET Process Using a Circuit Based Test Vehicle”, IEEE International Electron Devices Meeting (IEDM), Dec. 2019

L. Everson, S. Sapatnekar, and C.H. Kim, “A 40×40 Four-Neighbor Time-Based In-Memory Computing Graph ASIC Chip Featuring Wavefront Expansion and 2-Dimensional Gradient Control”, International Solid-State Circuits Conference (ISSCC), Feb. 2019

S. Kumar, M. Cho, L. Everson, Q. Tang, P. Meinerzhagen, A. Malavasi, D. Lake, C. Tokunaga, M. Khellah, J. Tschanz, V. De, and C.H. Kim, “Analysis of Neutron-Induced Multi-Bit-Upset (MBU) Clusters in 14nm Tri-Gate Flip-Flop Array”, IEEE Trans. on Nuclear Science (TNS), Apr. 2019

M. Liu and C.H. Kim, “A Powerless and Non-volatile Counterfeit IC Detection Sensor in Standard Logic Processes Based on an Exposed Floating-Gate Array”, IEEE Trans. on Electron Devices (TED), Issue 6, Vol. 66, pp. 2735-2740, June 2019

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