Magic Frequenty Asked Questions

Author: YuQing Yang

• Ten things to checking before sending out your designs for fabrication
  I summarized 10 point for checking the layout. I think 1 - 9 is mandatory, 10 is an option. I don't want to add more things to it. Because if the check list is too long, it may scare your students away. I hope that the layout becomes an enjoyable part of analog circuit design.

1. Check layout rule violation
   1. Type f : selects the whole circuit
   2. Type y : checks for layout rule violation only.
2. Do extraction and simulation again after making any changes to the layout.
3. Rember to draw an N-well around the PMOS transistors. The N-well should cover the N-well contact.
4. For each PMOS transistor, at least one N-well contact needs to be within a 20u-50u range.
5. The N-well contact should be connected to VDD.
6. For each NMOS transistor, at least one P-well contact should be within a 20u-50u range.
7. The P-well contact should be connected to GND.
8. Make sure every input and output is connected to the Pad. Check the connections for each pad.
9. Remember to connect your layout's VDD and GND to the pads' VDD and GND. Check the connection again.
10. Steps for performing simulations including pads.
    1. Type erase class : magic can't extract glass
    2. Label each pad
    3. Perform extract and simulation