MinnSSTA is a statistical static timing analysis tool considering spatial 
correlation of process parameters. The underlying algorithms are described in:

- H. Chang and S. S. Sapatnekar, "Statistical Timing Analysis Considering
  Spatial Correlations Using a Single PERT-like Traversal," Proceedings of the
IEEE/ACM International Conference on Computer-Aided Design, pp. 621 - 625,
2003. 

- H. Chang and S. S. Sapatnekar, "Statistical Timing Analysis Under Spatial
Correlations," IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems, Vol. 24, No. 9, pp. 1467 - 1482, September 2005.


(1) Input files to Minnssta 

As both gate and interconnect delays are considered, the input files to
MinnSSTA include circuit netlist (.bench), placement file (out.pl) and
interconnect routing file (.tre).

(a) *.bench: circuit netlist file
The netlist files are from ISCAS89 benchmark set that is available at:
http://www.cbl.ncsu.edu/pub/Benchmark_dirs/ISCAS89

- Here is a brief description of format of .bench file:

It starts by declaring the primary inputs/outputs. As an example,
  INPUT(G0) -- 'G0' is a primary input (PI)
  OUTPUT(G17) -- the output of gate 'G17' is a primary output (PO).
	Since the PO name is not explicitly given, in MinnSSTA, the POs
	are named after the gate providing the signal, e.g., POG17.
The netlist is described by a set of equation-like descriptions. For example,
	G10 = NOR(G14, G11)
means that G10 is of NOR-type, and it has 2 inputs which are outputs of G14 and
G11, respectively.

(b) out.pl: cell placement file
This is the output file from the placement tool Capo, available at:	
http://vlsicad.eecs.umich.edu/BK/PDtools/Capo/  

- The file gives the locations of all gates and PI/POs in the following format:
      <gate_name>  <x_coordinate> <y_coordinate>  :  <direction>
e.g.,      G10  14  0 :  N 

Capo requires GSRC format of circuit as input. In MinnSSTA, there is an
option to convert ISCAS89 *.bench files to GSRC format for Capo placer:
	 minnssta <ckt_name> -C -gsrc


(c) *.tre: interconnect routing file

The .tre file describes the routing tree structure of each net as:

TREE <net_name>
PIN <pin_ID> <type> <x_coordinate*1E+4> <y_coordinate*1E+4> <parentID>
...
ENDTREE

where
<net_name> is the name of net.
<pin_ID> is an ID given to a node in the tree. The ID is only unique in the
tree.
<type> can be 'source', 'sink' or 'intern' (for node of the tree other than
source/sink).
<x_coordinate*1E+4> <y_coordinate*1E+4> give the coordinate of the node.
<parentID> is the predecessor's pin_ID. If the parentID is 0, the node is root
of the tree.

The format can be more clear with an example:

TREE netG13
Pin 14 source 20000 250000 0
Pin 15 sink   120000 250000 16
Pin 16 intern 87495 253507 17
Pin 17 intern 48493 253507 14
ENDTREE

'netG13' has source at (20000,250000) and a sink at (120000,250000). 

The source is the root (parentID=0). The sink is routed to the source first by
conntecting to pin 16 (sink's parentID=16), pin 16 located at (87495, 253507)
has predecessor pin 17 (pin 16 has parentID=17), and pin 17 is connect to pin
14 which is the source.

The global router has different file format requirements. In MinnSSTA, there is
an option to read ISCAS89 *.bench files and out.pl placement file, and generate
files in the format required in the global router:
	 minnssta <ckt_name> -C -router

All the files above are used to provide the circuit information. The files of
the same circuit need to be provided in the same directory, and files' prefix
names should be the same as the directory name.  For example, for test circuit
s27, there should be a directory named s27 and the files inside should be named
as s27.bench, s27.tre and out.pl.


(d) In addition, standard cell library file is needed to provide the types of
cells in the benchmark, input/output pins and geometries. The format of the
file is:

MODULE <cell_name> <width> <height>
<pin_name> <direction: I/O>
...
ENDMODULE

As an example, two input NAND is decribed as: 
MODULE NAND2 2.0 6.0
in1 I
in2 I
out O
ENDMODULE


The paths to benchmarks and library are defined in a header file "define.h".
Currently the benchmark path is set to "./DATA", and library path to "./LIB".


(2) The output result of the program is directed to a file named logfile.txt.
For Monte Carlo timing analysis, an additional file named monte.rst is
generated which records the timing result of each simulation run.

(3) Usage:
minnssta <ckt_name> 
	 <option> <func> 
	 <gridsizeX> <gridsizeY> <numlevel> 
	 <loop/monte_only>

<ckt_name>: name of the circuit 
<option>:
  -T -- timing analysis
        <func> -stat -- statistical timing analysis 
               -conv -- conventional static timing analysis (multi-process corners)
               -mc -- monte-carlo timing analysis
               -mc0 -- monte-carlo timing analysis ignoring spatial correlations
	<gridsizeX> <gridsizeY>: X and Y size of the grid-based correlation model
	<numlevel>: levels of covariance (model2)
        <loop/monte> -- used for monte carlo analysis only, number of simulations
  -C -- format conversion
        <func> -gsrc  -- to GSRC format for placer Capo
        <func> -router -- to format for router

The input parameters "<gridsizeX> <gridsizeY>" are used to specify the size of
grid-based correlation. However, due to lack of real industry data, the
covariance matrix is derived by a quad-tree spatial correlation model in the
paper below, and the input parameter <numlevel> is used to specify the levels
of the quad-tree tree model.

A. Agarwal, D. Blaauw and V. Zolotov", "Statistical Timing Analysis for
Intra-Die Process Variations with Spatial Correlations", Proceedings of the
IEEE/ACM International Conference on Computer-Aided Design, pp. 900-907, 2003.


The usage will be more clear by examples given in the following part of sample
runs of MinnSSTA.

(4) Sample runs of MinnSSTA on circuit s27

The sample input circuit s27 is under the directory DATA.

(a) Perform statistical timing analysis on circuit s27, using 2 by 2 grids of
correlation model. 

For 2 by 2 grid, the number of levels in quad-tree is 2.

	% minnssta s27 -T -stat 2 2 2

The program will then prompt for inputing the percentage of variations in each
level. 

	input percentage for levels (2 numbers):0.5 0.5

The output results are in: stat-logfile.txt

(b) Analysis of timing by Monte Carlo approach with 10000 loops, again using 2
by 2 grid model:
	% minnssta s27 -T -mc 2 2 2 10000

The output results are in: mc-logfile.txt, mc-monte.rst

(c) Analysis of timing by Monte Carlo approach with 10000 loops, ignoring
spatial correlation of process parameters, again using 2 by 2 grid model:
	% minnssta s27 -T -mc0 2 2 2 10000

The output results are in: mc0-logfile.txt, mc0-monte.rst

(d) Multi-process corners approach:
	% minnssta s27 -T -conv 2 2 2

The output results are in: mpc-logfile.txt

(5) Miscellaneous

The program uses MATLAB functions to calculate the PCA coefficients from the
covariance matrix of parameter varations. Therefore correct directory of the
MATLAB library files libmx.so, libut.so, libmat.so and libeng.so must be given
in the Makefile. To ensure that the program runs correctly, for some systems
the environmental variable LD_LIBRARY_PATH has to include this directory. The
directory which contains the file libstdc++-libc6.1-2.so.3 must also be
included in the variable. For example, if the directory containing the MATLAB
libraries is PATH1, and the directory containing libstdc++-libc6.1-2.so.3 is
PATH2, then the command to change LD_LIBRARY_PATH should be

	 % setenv LD_LIBRARY_PATH PATH1:PATH2

You can set PATH1 and PATH2 appropriately in misc/environ (the current entries
will probably not work in your setup!), and then type

         % source environ
