The IEEE Circuits and Systems Society has awarded ECE’s Prof. Keshab Parhi the Mac Van Valkenburg Award for pioneering contributions to VLSI digital signal processing architectures, design methodologies, and their applications to wired and wireless communications, and service to IEEE Circuits and Systems Society.
The Mac Van Valkenburg Award honors individuals for outstanding technical contributions and distinguishable leadership in a field within the scope of the Circuits and Systems Society. The award is based on the quality and significance of contribution, and continuity of technical leadership.
Prof. Parhi has made significant and long-lasting impacts through his seminal and pioneering research in the broad field of Very Large Scale Integrated (VLSI) design of digital signal processing, image processing and communications systems. His research is used in many integrated circuit chips for broadband communications systems that form the backbone of the internet. Examples include gigabit ethernet and 10-gigabit ethernet on copper and fiber cables, cable modems, settop boxes, chip-to-chip communication in backplanes and serializers-deserializers (a.k.a. serdes), cell phones, and storage systems. He is widely recognized for his pioneering work on pipelining and parallel processing of numerous recursive computations such as decision-feedback equalizers and Tomlinson-Harashima precoders using various look-ahead techniques. He developed the theory of folding and
unfolding transformations for data-flow graphs that describe digital signal processing programs. He also authored the text book: VLSI Digital Signal Processing Systems (John Wiley and Sons, 1999). He is the author of over 600 papers and inventor or coinventor of 29 US patents.
Prof. Parhi has served the IEEE Circuits and Systems (CAS) society in numerous capacities. He was the Editor-in-Chief of the IEEE Transactions on Circuits and Systems, Part-I during 2004 and 2005. He has served in Associate Editor capacity for various journals 14 times. He served on the Board of Governors of the CAS society during 2005-2007. He was Chair of the Technical Committee on VLSI Systems and Applications during 2003 and 2004, and a founding member of the Nano-Giga Technical Committee of the IEEE CAS society. Previously, Prof. Parhi was awarded the 2012 Charles A. Desoer Technical Achievement award and a 2000 Golden Jubilee Medal from the IEEE CAS Society. He also received the 2003 Kiyo Tomiyasu Technical Field award from the IEEE and the 2004 Frederick Emmons Terman award from the American Society of Engineering Education.
Prof. Parhi, along with his former doctoral student Yingjie Lao (now faculty at Clemson University), is also the recipient of the 2017 IEEE VLSI Best Paper Award. The paper “Obfuscating DSP Circuits via High-Level Transformations,” was published in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems in the May 2015 issue.
This paper presents a novel approach to the design of obfuscated circuits for digital signal processing (DSP) applications using high-level transformations, a key-based obfuscating finite-state machine (FSM), and a reconfigurator. The goal is to design DSP circuits that are harder to reverse engineer thereby protecting the designer’s intellectual property. Typically, a hacker determines the functionality of a DSP circuit in one of two ways: either by structural analysis to isolate the original design, or by simulation-based reverse engineering to determine functionality of the design.
To protect DSP circuits against reverse engineering, the obfuscated circuits will only operate in the desired mode with a negligible probability that others would be able to find. Thus, the correct functionality is hidden to the adversary even when the adversary can access the DSP circuits. For details, read the award-winning paper here.